A novel high stepup converter is presented herein, which combines the conventional buckboost converter, the charge pump capacitor and the coupling inductor. By doing so, a quite high voltage conversion ratio due to not only the turns ratio but also the duty cycle, so as to increase design feasibility. It is noted that the denominator of the voltage conversion ratio is the square of one minus duty cycle. Above all, there is no voltage spike across the switch due to the leakage inductance and hence no passive or active snubber is needed, and furthermore, the used switch is driven without isolation and hence the gate driving circuit is relatively simple, thereby upgrading the industrial application capability of this converter. In this paper, the basic operating principles and the associated mathematical deductions are firstly described in detail, and finally some experimental results are provided to demonstrate the effectiveness of the proposed high stepup converter.
1. Introduction
As generally recognized, the boost converter is widely used in the renewable energy system, in the standby power source, in the car power source, in the 3C (Computer, Communication, ConsumerElectronics) product, etc. The purpose of the boost converter is used to transfer the low voltage level to the stable high voltage level, so as to stabilize the overall system. Therefore, the traditional boost converter is used as a power stage, which boosts the input voltage to a 400V dc voltage to feed the standby power source, or to generate a gridconnected 220V ac voltage via the DCAC inverter. However, the traditional boost converter has the voltage conversion ratio about four. This is because the nonideal properties due to parasitic components make the voltage conversion ratio deteriorated
[1
,
2]
.
Consequently, many kinds of voltageboosting techniques have been presented, including several inductors which are magnetized and then pump the stored energy into the output with all inductors connected in series
[3]
, coupled inductors with turns ratios
[4

8
,
9
,
10
,
14
,
18
,
19]
, voltage superposition based on switching capacitors
[12

17]
, auxiliary transformers with turns ratios
[11]
, etc. In
[8]
and
[9]
, the output terminal is floating, thereby increasing application complexity. In
[6
,
7]
and
[10]
, these converters contain too many components, thereby making the converters relatively complicated. In
[3

10
,
14

16
,
18]
and
[19]
, the output currents are pulsating, thus causing the output voltage ripples to tend to be large. In
[11

13]
and
[17]
, even though the output currents are nonpulsating, their voltage conversion ratios are not high enough.
Therefore, a novel high stepup converter is presented herein, which combines the traditional buckboost converter, the charge pump and the coupling inductor. This converter possesses relatively high voltage conversion ratio, the designer can use the turns ratio to vary the voltage conversion ratio so as to make the circuit design relatively elastic. Above all, the used power switch is not floating, so as to make the gate driving circuit quite simple. Furthermore, there is no voltage spike across the switch due to the leakage inductance. In this paper, the basic operating principles and the associated mathematical deductions are firstly depicted in detail, and eventually some experimental results are provided to verify the effectiveness of the proposed high stepup converter.
2. Overall System Configuration
Fig. 1
shows the proposed high stepup converter, which is constructed by the traditional buckboost converter, and the coupling inductor and charge pump capacitor circuit. The traditional buckboost converter contains one switch
S
_{1}
, two diodes
D
_{1}
and
D
_{4}
, one inductor
L
_{1}
, and one energytransferring capacitor
C
_{1}
. The coupling inductor and charge pump capacitor circuit contains one switch
S
_{1}
, three diodes
D
_{2}
,
D
_{3}
and
D
_{4}
, one charge pump capacitor
C
_{2}
, one output capacitor
C_{o}
, and one coupling inductor with turns ratio of
N
_{1}
:
N
_{2}
, where
N
_{1}
and
N
_{2}
are the primaryside turns and the secondaryside turns, respectively. It is noted that the coupling inductor is built up by one magnetizing inductor
L_{m}
and one ideal transformer.
Proposed high stepup converter with variables added.
3. Basic Operating Principles
Prior to taking up this section, there are some assumptions and symbols to be given as follows in
Fig. 1
: (i) the coupling coefficient
k
is equal to one, that is, the primary and secondary leakage inductances are negligible; (ii) the dc input and output voltages are defined to be
V_{i}
and
V_{o}
, respectively; (iii) the dc input and output currents are signified by
I_{i}
and
I_{o}
, respectively; (iv) the current in
S
_{1}
is indicated by
i
_{DS1}
; (v) the currents in
D
_{1}
,
D
_{2}
,
D
_{3}
and
D
_{4}
are denoted by
i
_{D1}
,
i
_{D2}
,
i
_{D3}
and
i
_{D4}
, respectively; (vi) the values of
C
_{1}
and
C
_{2}
are large enough to keep the voltages across themselves constant at some values, equal to
V
_{C1}
and
V
_{C2}
, respectively; (vii) the current flowing through
L
_{1}
is expressed by
i
_{L1}
; (viii) the currents in the
N
_{1}
and
N
_{2}
windings are signified by
i
_{1}
and
i
_{2}
, respectively; (ix) the current in
L_{m}
is indicated by
i_{Lm}
; (x)
i
_{3}
is the sum of
i
_{1}
and
i_{m}
; (xi) the gate driving signal for
S
_{1}
is denoted by
v
_{gs1}
; (xii) the voltages on
S
_{1}
is represented by
v
_{DS1}
; (xiii) the voltage across
L
_{1}
is expressed by
v
_{L1}
; (xiv) the voltage across
L_{m}
or the voltage across the
N
_{1}
winding is expressed by
v
_{N1}
; (xv) the voltage on the
N
_{2}
winding indicated by
v
_{N2}
; (xvi) the turns ratio of
n
is equal to
N
_{2}
/
N
_{1}
; and (xvii) the duty cycle
D
is the quiescent dc duty cycle created from the controller.
 3.1 CCM Operation
Since the converter operates in the continuous conduction mode (CCM), there are two operating states with the illustrated waveforms as shown in
Fig. 2
.
Illustrated waveforms related to the proposed converter.
 3.1.1 State 1 (t0≤t≤t1)
As shown in
Fig. 3(a)
,
S
_{1}
is turned on. Hence, the voltage across
L
_{1}
is equal to
V_{i}
, thereby causing
L
_{1}
to be magnetized. At the same time,
D
_{1}
and
D
_{3}
are turned off, but
D
_{2}
and
D
_{4}
are turned on. Accordingly, the voltage across
L_{m}
,
v
_{N1}
, is equal to the input voltage
V_{i}
plus the voltage across
C
_{1}
,
V
_{C1}
, thereby causing
L_{m}
to be magnetized. In addition,
C
_{2}
is charged by
V_{i}
+
V
_{C1}
+
v
_{N2}
. Therefore,
Current flows in: (a) state 1; (b) state 2.
 3.1.2 State 2 (t1≤t≤t0+Ts)
As shown in
Fig. 3(b)
,
S
_{1}
is turned off. Hence,
D
_{2}
and
D
_{4}
are turned off, but
D
_{1}
and
D
_{3}
are turned on. At the same time, the voltage across
L
_{1}
,
v
_{L1}
, is equal to −
V
_{C1}
, thereby causing
L
_{1}
to be demagnetized and to energize the output, whereas the voltage across
L_{m}
,
v
_{N1}
, is equal to
V_{i}
+
V
_{C1}
+
V
_{C2}
−
v
_{N2}
−
V_{o}
, thereby causing
L_{m}
to be demagnetized. Therefore,
Since the turns ratio
n
is equal to
N
_{2}
/
N
_{1}
, (2) can be rewritten to be
Applying the voltagesecond balance to
L
_{1}
, we can obtain the following equation:
Eq. (4) can be rewritten to be
By applying the voltagesecond balance to
L_{m}
, we can obtain the following equation:
where
Substituting (5) and (7) into (6) yields the voltage conversion ratio of the proposed high stepup converter:
 3.2 Comparison of flyback, forward and proposed converters
As generally acknowledged, the duty cycle of the flyback converter does not approach to one due to the parasitic parameters of components, whereas the duty cycle of the forward converter also does not approach to one due to a suitable time slot needed to reset the magnetizing inductance. Based on the aforementioned, the comparison in voltage conversion ratio between the flyback converter, the forward converter and the proposed converter is under the condition that each converter operates in the continuous conduction mode (CCM) with the turns ratio set to 3 and the duty cycle set at 0.75. Therefore, the voltage conversion ratios for the flyback converter, the forward converter and the proposed converter are 2.25, 9, and 68, respectively. That is, the proposed converter has a quite high voltage conversion ratio as compared with the flyback converter and forward converter.
 3.3 CCM with leakage inductance considered
By considering the leakage inductance
L_{lk}
as shown in
Fig. 4
, in state 1, the corresponding equation of
v
_{N1}
expressed by (1) will be modified to
Proposed high stepup converter with leakage inductance considered.
where
k
=
L_{m}
/ (
L_{m}
+
L_{lk}
).
And, in state 2, the corresponding equation of
v
_{N1}
will be modified to
By applying the voltage balance to the magnetizing inductor based on (9) and (10), the resulting voltage conversion ratio can be obtained to be
From (11), as the value of
k
is close to one, the voltage conversion ratio is retrieved to (8).
 3.3 BCM operation
Since there are two inductors
L
_{1}
and
L_{m}
in the proposed high stepup converter, the corresponding boundary conduction mode (BCM) conditions will be discussed in the following, so as to make design of
L
_{1}
and
L_{m}
relatively easy. It is assumed that there is no power loss, i.e., the input power is equal to the output power.
 3.3.1 BCM Condition forL1
Based on (8), the dc input current
I_{i}
can be expressed as
where
Substituting (10) into (9) yields
Since the dc current in
L
_{1}
,
I
_{L1}
, is equal to
I_{i}
, (11) can be rewritten to be
Also, the current ripple of
i
_{L1}
, denoted by Δ
i
_{L1}
, can be expressed to be
Hence, the condition for
L
_{1}
operating in BCM is
where
and
Thus, if
K
_{1}
is larger than
K
_{crit1}
(
D
), then
L
_{1}
operates in CCM; if
K
_{1}
is smaller than
K
_{crit1}
(
D
), then
L
_{1}
operates in DCM.
 3.3.2 BCM Condition forLm
The dc portion of the current in the magnetizing inductor
L_{m}
, denoted by
I_{Lm}
, can be represented by
Substituting (10) into (17) yields
Also, the current ripple of
i_{Lm}
, denoted by Δ
i_{Lm}
, can be expressed to be
Substituting (5) into (19) yields
Hence, the condition for
L_{m}
operating in BCM is
Accordingly,
K
_{2}
is larger than
K
_{crit2}
(
D
), then
L_{m}
operates in CCM; if
K
_{2}
is smaller than
K
_{crit1}
(
D
), then
L_{m}
operates in DCM.
3. Design Considerations
Prior to taking up this section, there are some system specifications and key components to be given as follows: (i) the range of the dc input voltage
V_{i}
is from 20V to 28V with 24V rated; (ii) the rated dc output voltage
V_{o}
is 400V; (iii) the rated dc output power
P_{o,rated}
is 200W, i.e., the rated dc output current
I_{o,rated}
is 0.5A; (iv) the minimum dc output power
P_{o,min}
is 40W, i.e., the minimum dc output current
I_{o,min}
is 0.1A; (v) the switching frequency
f_{s}
is 50kHz, i.e., the switching period
T_{s}
is 20μs; and (vi) the product name of the control IC is MC34060A. It is noted that the proposed converter operates in CCM above the minimum dc output current. In addition,
Tables 1
and
2
show the voltage and current stresses of the switch and diodes, and the specifications for the components used in the main power stage of the proposed converter.
Voltage and current stresses of the switch and diodes
Voltage and current stresses of the switch and diodes
Components used in the main power stage of the proposed converter
Components used in the main power stage of the proposed converter
Sequentially, the energystoring components, such as
L
_{1}
,
L_{m}
,
C
_{1}
,
C
_{2}
and
C_{o}
, are taken into account, under the condition that the converter operates in CCM and the turns ratio of the coupling inductor,
n
, is set to one.
 4.1 Design ofL1
Fig. 5(a)
shows the waveforms related to
L
_{1}
.In addition, (8) can be rewritten to be
Waveforms related to: (a) L_{1}; (b) L_{m}.
From (24), the duty cycle
D
can be obtained as
Therefore, according to (25), the minimum duty cycle
D_{min}
occurs at the maximum dc input voltage
V_{i,max}
, and the maximum duty cycle
D_{max}
occurs at the minimum dc input voltage
V_{i,min}
.
Sequentially, based on
Fig. 5(a)
, Δ
i
_{L1}
can be expressed to be
Therefore, the maximum value of Δ
i
_{L1}
, signified by Δ
i
_{L1, max}
, can be expressed to be
In order to make sure that
L
_{1}
operates in CCM, the following inequality must be obeyed:
where
I
_{L1,min}
is the minimum dc current in
L
_{1}
.
Also, if the efficiency of the overall system is assumed to be equal to 100%, then the following equation can be obtained to be
Based on (27) to (29), the inequality for
L
_{1}
can be obtained to be
Therefore, the value of
L
_{1}
is larger than 115.4μH so as to make sure that
L
_{1}
operates in CCM. Furthermore, considering the efficiency performance, the higher the value of
L
_{1}
is, the smaller the peak current in
L
_{1}
and hence the lower the conduction loss and core loss. Eventually, the value of
L
_{1}
is chosen to be 225μH, which is about double the calculated value. Also, the core, named CC4220/JPP44A, is selected to construct
L
_{1}
along with the corresponding turns of 38 and the required airgap of 1.622mm.
 4.2 Design ofLm
Fig. 5(b)
shows the waveforms related to
L_{m}
. In addition, Δ
i_{Lm}
can be expressed as
According to (5) and (31) can be rewritten as
Therefore, it can be seen that the maximum value of Δ
i_{Lm}
, signified by Δ
i_{Lm,max}
, can be expressed to be
In order to make sure that
L_{m}
operates in CCM, the following equation must be obeyed:
where
I_{Lm,min}
is the minimum dc current in
L_{m}
and can be expressed to be
Based on (33) to (35), the inequality for
L_{m}
can be obtained as
Hence, the value of
L_{m}
is larger than 824.6μH, so as to make sure that
L_{m}
operates in CCM. Furthermore, considering the limitation of winding area, the value of
L_{m}
is chosen to be 900μH, which is about 1.1 times of the calculated value. Also, the core, named CC4220/JPP44A, is selected to construct
L_{m}
along with the corresponding
N
_{1}
turns of 48 and the required airgap of 0.628mm. In addition, since
n
is set at one, the corresponding
N
_{2}
turns are also 48.
 4.3 Design ofC1
From
Fig. 6(a)
, the voltage ripple on
C
_{1}
, called Δ
v
_{C1}
, is composed of the voltage ripple Δ
v
_{C1_ESR}
created from the current flowing through the equivalent series resistor
ESR
_{C1}
, and the voltage ripple Δ
v
_{C1_cap}
created from the charging and discharging of
C
_{1}
Therefore, Δ
v
_{C1}
can be expressed to be
Also, Δ
v
_{C1_ESR}
can be represented by
where
where tan
δ
_{C1}
is the dissipation factor of
C
_{1}
.
In addition, Δ
v
_{C1_cap}
can be signified by
where
i
_{C1_(1−D)}
is the current flowing through
C
_{1}
during the turnoff period.
By assuming the value of Δ
v
_{C1}
is set at 1% of the rated dc output voltage
V_{o}
, substituting (8), (38), (39) and (40) into (37) yields the following rearranged equation:
Based on (25) and (41), the minimum value of
C
_{1}
occurs under the conditions of the rated dc output power and the minimum dc input voltage. In addition, under the given switching period
T_{s}
, the value of 1 tan
δ
_{C1}
is about 13.13 based on the datasheet of Rubycon ZLH series capacitors. Hence, the minimum value of
C
_{1}
can be calculated to be 1563μF as follows:
Finally, one 2200μF Rubycon capacitor is chosen for
C
_{1}
.
 4.4 Design of C2
From
Fig. 6(b)
, the voltage ripple on
C
_{2}
, called Δ
v
_{C2}
, is composed of the voltage ripple Δ
v
_{C2_ESR}
created from the current flowing through the equivalent series resistor
ESR
_{C2}
, and the voltage ripple Δ
v
_{C2_cap}
created from the charging and discharging of
C
_{2}
. Therefore, Δ
v
_{C2}
can be expressed to be
Waveforms pertaining to: (a) C_{1}; (b) C_{2}; (c) C_{o}.
Also, Δ
v
_{C2_ESR}
can be represented by
where
where tan
δ
_{C2}
is the dissipation factor of
C
_{2}
.
Moreover, Δ
v
_{C2_cap}
can be signified by
where
i
_{C2 _(1−D)}
is the current flowing through
C
_{2}
during the turnoff period.
By assuming that the value of Δ
v
_{C2}
is set at 0.5% of the rated dc output voltage
V_{o}
, substituting (8), (44), (45) and (46) into (43) yields the following rearranged equation:
Based on (25) and (47), the minimum value of
C
_{2}
occurs under the conditions of the rated dc output power and the minimum dc input voltage. In addition, under the given switching period
T_{s}
, the value of tan
δ
_{C2}
is about 6.22 based on the datasheet of Nichicon CS series capacitors. Hence, the minimum value of
C
_{2}
can be worked out to be 92.3μF as follows:
Eventually, one 220μF Nichicon capacitor is selected for
C
_{2}
.
 4.5 Design of Co
From
Fig. 6(c)
, the voltage ripple on
C_{o}
, called Δ
v_{o}
, is composed of the voltage ripple Δ
v_{Co_ESR}
created from the current flowing through the equivalent series resistor
ESR_{Co}
, and the voltage ripple Δ
v_{Co_cap}
created from the charging and discharging of
C_{o}
. Therefore, Δ
v_{o}
can be expressed to be
Also, Δ
v
_{C2_ESR}
can be represented by
where
where tan
δ_{Co}
is the dissipation factor of
C_{o}
.
Besides, Δ
v
_{Co_cap}
can be signified by
where
i
_{Co_(D)}
is the current flowing through
C_{o}
during the turnon period.
By assuming that the value of Δ
v_{o}
is set at 0.1% of the rated output voltage
V_{o}
, substituting (8), (50), (51) and (52) into (49) yields the following rearranged equation:
Based on (25) and (53), the minimum value of
C_{o}
occurs under the conditions of the rated dc power and the minimum dc input voltage. In addition, under the given switching period
T_{s}
, the value of tan
δ_{Co}
is about 14.14 based on the datasheet of Rubycon CXW series capacitors. Hence, the minimum value of
C_{o}
can be figured out to be 180.9μF as follows:
At last, two 150μF Rubycon capacitors, one 0.33μF plastic capacitor and one 22nF plastic capacitor are chosen for
C_{o}
and paralleled together.
 4.6 Switch utilization
Like the traditional boost converter, the higher the voltage conversion ratio is, the lower the switch utilization
SU
[2]
, which is defined to be
where
Therefore, based on (55), the switch utilization of the proposed converter is about 0.032. This value is quite low due to the corresponding voltage conversion ratio is ultra high, about 20.
5. Experimental Results
On the one hand,
Fig. 7
shows the waveforms relevant to the input voltage of 24V at rated load.
Fig. 7
depicts the gate driving signal for
S
_{1}
,
v
_{gs1}
, and the current in
L
_{1}
,
i
_{L1}
;
Fig. 8
shows the gate driving signal for
S
_{1}
,
v
_{gs1}
, the current
i
_{3}
with the sum of the current in
N
_{1}
,
i
_{1}
, and the current in
L_{m}
,
i_{Lm}
, and the current in
N
_{2}
,
i
_{2}
;
Fig. 9
depicts the gate driving signal for
S
_{1}
,
v
_{gs1}
, the current in
D
_{4}
,
i
_{D4}
, and the current in
S
_{1}
,
i
_{DS1}
;
Fig. 10
shows the gate driving signal for
S
_{1}
,
v
_{gs1}
, and the voltages on
C
_{1}
and
C
_{2}
,
v
_{C1}
and
v
_{C2}
;
Fig. 11
depicts the gate driving signal for
S
_{1}
,
v
_{gs1}
, and the output voltage ripple Δ
v_{o}
;
Fig. 12
shows the gate driving signal for
S
_{1}
,
v
_{gs1}
, and the voltage on
S
_{1}
,
v
_{DS1}
. From these figures, it can be seen that the proposed converter can operate well to some extent and the output voltage ripple is about 360mV, i.e., 0.09% of
V_{o}
, smaller than 0.1% of
V_{o}
. Furthermore, it can be seen that from
Fig. 12
, the voltage across
S
_{1}
has no voltage spike.
Measured waveforms under the input voltage of 24V at rated load: (1) v_{gs1}; (2) i_{L1}.
Measured waveforms under the input voltage of 24V at rated load: (1) v_{gs1}; (2) i_{3}; (3) i_{2}.
Measured waveforms under the input voltage of 24V at rated load: (1) v_{gs1}; (2) i_{D4}; (3) i_{DS1}.
Measured waveforms under the input voltage of 24V at rated load: (1) v_{gs1}; (2) v_{C1}; (3) v_{C2}.
Measured waveforms under the input voltage of 24V at rated load: (1) v_{gs1}; (2) ^{Δvo} .
Measured waveforms under the input voltage of 24V at rated load: (1) v_{gs1}; (2) v_{DS1}.
The following is used to further explain the current spikes on
i
_{2}
and
i
_{3}
shown in
Fig. 8
. Since the proposed converter operates in CCM, the reverse recovery currents created from the diodes are indispensible. Aside from this, in order to reduce the primary and secondary leakage inductances, the bifilar winding technique is adopted, thereby causing the equivalent parasitic capacitance in the transformer to be increased. Furthermore, since the proposed converter is an ultra high stepup converter, the voltage across the transformer is relatively large during the turnoff period, implying that the energy stored in the equivalent parasitic capacitance in the transformer is relatively large. Therefore, based on the mentioned above, high current spikes occur as soon as the switch is turned on. This phenomenon can be seen in the traditional boost converter operating in CCM with a high output voltage. As generally acknowledged, these current spikes will create EMI noises. However, the EMI problem should be taken into account from many aspects, such as EMI choke design, shielding design, layout, etc. Consequently, in this paper, it is very hard to discuss the effects of these current spikes on the EMI problem.
Besides,
Figs. 13
and
14
are used to show load transient responses due to step load change from 50% to 100% load and 100% and 50%, respectively. From these figures, it can be seen that the values of two recovery times are both about 1.2V, and the values of the undershoot and overshoot are both within 16ms. And,
Fig. 15
shows a photo of the experimental setup.
Load transient response due to step load change from 50% to 100% load under the rated input voltage.
Load transient response due to step load change from 100% to 50% load under the rated input voltage.
Photo of the experimental setup.
Finally,
Table 3
makes a comparison between the proposed converter and the converters shown in the References, in terms of voltage conversion ratio, component number, switch voltage stress, output inductor and floating output. From
Table 3
, it can be seen that the denominator of the voltage conversion ratio of the proposed converter is the square of one minus duty cycle, and hence, under a given duty cycle and turns ratio, the proposed converter has a higher voltage conversion ratio than all the other references do, but the corresponding voltage stress is higher than all the other voltage stresses. Also, the number of the components is 10, which is acceptable as compared to those used in the References.
Comparison between the proposed converter and the converters shown in the References, in terms of voltage conversion ratio, component number, switch voltage stress, output inductor and floating output
Comparison between the proposed converter and the converters shown in the References, in terms of voltage conversion ratio, component number, switch voltage stress, output inductor and floating output
6. Conclusion
A high stepup converter is presented herein, which combines the traditional buckboost converter, the charge pump capacitor and the coupling inductor, so as to make the circuit design relatively elastic. Above all, the leakage inductance energy can be recycled to the output, and hence no voltage spike on the switch occurs. In addition, the used power switch is not floating, so as to make the gate driving circuit quite simple. Based on the mentioned above, this converter is very suitable for the green energy applications.
BIO
K. I. Hwu He was born in Taichung, Taiwan, on August 24, 1965. He received the B.S. and Ph.D. degrees in electrical engineering from National Tsing Hua University, Hsinchu, Taiwan, in 1995 and 2001, respectively. From 2001 to 2002, he was the Team Leader of the VoltageRegulated Module (VRM) at AcBel Company. From 2002 to 2004, he was a Researcher at the Energy and Resources Laboratories, Industrial Technology Research Institute. He is currently a Professor at the Institute of Electrical Engineering, National Taipei University of Technology, Taipei, Taiwan, where he was the Chairman of the Center for Power Electronics Technology from 2005 to 2006. His current research interests include power electronics, converter topology, and digital control.
T. J. Peng He received the M.S degree in electrical engineering from National Taipei University of Technology, Taipei, Taiwan. His research interest is power electronics.
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